| A Hierarchical RAM Simulation Model Framework |
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Hye-Lyeong Kim, Sang-Yeong Choi |
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Korea National Defense University |
| 계층적 RAM 시뮬레이션 모델 프레임워크 |
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김혜령, 최상영 |
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국방대학교 국방과학부 |
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| Abstract |
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In this paper, we propose a hierarchical RAM simulation model framework which are used to analyze the RAM specifications on the concept refinement phase. The hierarchical RAM simulation model framework consists of RAM simulation models, class library and each model's input and output data lists. The hierarchical RAM simulation models are co-operated with 3 kinds of model - type I, II, III. Type I, II models are used to analyze the target operational availability and Type III is used to establish the initial RAM specifications. Each model's input and output data lists are defined by considering each model's purpose of RAM analysis. The class library is arranged with each model's classes for implementing the hierarchical simulation models. The proposed framework may be applied for executing the RAM activities effectively. |
| Key Words:
RAM(Reliability, Availability, Maintainability), Ao(Operational Availability), MTBF/MKBF/MRBF(Mean Time/Kilometer/Round Between Failure), MTTR(Mean Time To Repair) |
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